1. Field of the Invention
The present invention relates to a dynamic semiconductor memory device and a bit line precharge method therefor. More particularly, the present invention relates to a dynamic random access memory (DRAM) that performs a refresh operation in a standby mode and a bit line precharge method.
2. Background of the Invention
Reducing power dissipation of integrated circuits in battery-driven equipment, such as a cellular telephone or a personal digital assistant (PDA), is a significant challenge. Previously, static random access memories (SRAMs) have been used extensively in semiconductor memory applications, because a SRAM memory cell typically has six complementary metal oxide semiconductor (CMOS) transistors and allows data to be retained with a minimal amount of current drain. In terms of area, however, the SRAM memory cell, is larger than a DRAM memory cell by a factor of twenty or more. In addition, memory capacities are increasing proportionately with circuit and wiring densities. As such, fabricating a 32-Mbit or 64-Mbit SRAM using current wiring technology of about 0.2 μm to about 0.13 μm inevitably results in an excessively large chip. Consequently, from the viewpoint of area efficiency, SRAMs are inferior to DRAMs, and the disadvantage of poor area efficiency ultimately inhibits continued process technology scaling. For this reason, in many applications SRAMs are being replaced by DRAMs.